Design of an embedded system for automatically determination of the varieties of wheat seeds grown in Turkey based on image analysis
Agro-Geoinformatics 2016, Tianjin/ÇİN HALK CUMHURİYETİ, 18 Temmuz 2016
AYGÜN SERCAN,YAZGAÇ BİLGİ GÖRKEM,KIRCI MÜRVET,GÜNEŞ ECE OLCAY
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Design of a fully-differential double folded cascode class AB opamp with continuous time common mode feedback network for 12-bit pipeline ADC applications
2017 International Conference on Computer Science and Engineering (UBMK), Antalya, Turkey/TÜRKİYE, 5 Ekim 2017
KOUHALVANDİ LİDA,AYGÜN SERCAN,GÜNEŞ ECE OLCAY,KIRCI MÜRVET
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Design and Implementation of Ultra Wide Band Digital Phase Shifter Cells on a Silicon Substrate
Mediterranean Microwave Symposium 2017, 28 Kasım 2017
AVCI CELAL,GÜNEŞ ECE OLCAY,YARMAN BEKİR SIDDIK BİNBOĞA
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DESIGN OF A HIGH GAIN TELESCOPIC-CASCODE OPERATIONAL AMPLIFIER BASED ON THE ZTC OPERATION CONDITION
ICECS 2017, Batum/GÜRCİSTAN, 5 Aralık 2017, s. 5-8
KOUHALVANDİ LİDA,AYGÜN SERCAN,GÜNEŞ ECE OLCAY,KIRCI MÜRVET
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Design and Implementation of Novel and Compact 2-bit Wide Band Digital Phase Shifter
Mediterranean Microwave Symposium 2018, 31 Ekim 2018
AVCI CELAL,GÜNEŞ ECE OLCAY,YARMAN BEKİR SIDDIK BİNBOĞA
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DESIGN OF 0-15GHZ BAND 180 DEGREE DIGITAL PHASE SHIFTING CELL TOPOLOGY
ICECS 2017, Batum/GÜRCİSTAN, 5 Aralık 2017, s. 1-4
AVCI CELAL,GÜNEŞ ECE OLCAY,YARMAN BEKİR SIDDIK BİNBOĞA
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1.5 Bit/Stage, 12-Bit Pipeline ADC Design with Foreground Calibration
The Sixth International Conference on Advances in Computing, Electronics and Communication - ACEC 2017, Roma/İTALYA, 9 Aralık 2017, s. 1-5
AYGÜN SERCAN,KOUHALVANDİ LİDA,GÜNEŞ ECE OLCAY
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Sobel filter operation in image processing via stochastic arithmetic-logic unit design
Signal Processing and Communications Applications Conference (SIU), 2017 25th, ANTALYA/TÜRKİYE, 15 Mayıs 2017, s. 1-4
AYGÜN SERCAN,ALTUN MUSTAFA,GÜNEŞ ECE OLCAY
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Fault tolerant register file design for MIPS AES crypto microprocessor
Electronics, Circuits, and Systems (ICECS), 2015 IEEE International Conference on, 6 Aralık 2015
USTAOĞLU BUSE,ÖRS YALÇIN SIDDIKA BERNA
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Design of new tiny circuits for AES encryption algorithm
2009 3rd International Conference on Signals, Circuits and Systems (SCS), 6 Kasım 2009
DALMIŞLI VOLKAN,ÖRS YALÇIN SIDDIKA BERNA
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A novel S-box design based on quantum tent maps and fractional stochastic models with an application in image encryption
Soft Computing, Aralık 2023, ISSN: 1432-7643
HEMATPOUR NAFİSEH, GHARARİ FATEMEH, ÖRS YALÇIN SIDDIKA BERNA, YALÇIN MÜŞTAK ERHAN
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System on Chip Design with Vivado High-Level Synthesis Tool
11th INTERNATIONAL CONFERENCE on ELECTRICAL and ELECTRONICS ENGINEERING, 28 Kasım 2019
BİLGİLİ BARIŞ,YAMANEREN CEYHUN,VATANSEVER KUBİLAY,ÇOLTU UMUT,ÖRS YALÇIN SIDDIKA BERNA
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System level design of scalable encryption algorithm by using CoWare
2013 International Conference on Computer, Information and Telecommunication Systems (CITS), Athens, Greece/YUNANİSTAN, 7 Mayıs 2013, s. 1-4
ALTINTAŞ ABİDİN,ÖRS YALÇIN SIDDIKA BERNA
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Flexible Hardware Design for RSA and Elliptic Curve Cryptosystems
Topics inCryptology - CT-RSA, The Cryptographers’xx Track at the RSA Conference, 23 Şubat 2004, s. 250-263
BATİNA LEJLA,BRUİNMUURLİNG GE,ÖRS YALÇIN SIDDIKA BERNA
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Energy Efficient Sensor Design and Implementation on FPGA by Using Open Source Processors
2019 27th Signal Processing and Communication Application Conference (SIU), 24 Nisan 2019
DEMİRTÜRK MEHMET ONUR,AKÇAY LATİF,ÖRS YALÇIN SIDDIKA BERNA
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Design and implementation of a custom verification environment for fault injection and analysis on an embedded microprocessor
2015 Third International Conference on Technological Advances in Electrical, Electronics and Computer Engineering (TAEECE), 29 Nisan 2015, s. 256-261
USTAOĞLU BUSE,ÖRS YALÇIN SIDDIKA BERNA
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Instruction Extension of an Open Source RV32IMC Core for NTRU Cryptosystem
24th European Conference on Circuit Theory and Design (ECCTD), 7 Eylül 2020
TOPAL CANBERK,İŞMAN ELİF,ÖRS YALÇIN SIDDIKA BERNA
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A Layered UVM Based Testbench Design for SpaceWire
9th International Conference on Electrical and Electronics Engineering (ELECO), 26 Kasım 2015
BAĞBABA AHMET ÇAĞRI,USTAOĞLU BUSE,ERDEM İNAN,ÖRS YALÇIN SIDDIKA BERNA
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An FPGA Implementation of a Montgomery multiplier over GF 2 m
7th IEEE Workshop on Design Diagnostics of Electronic Circuits Systems (DDECS), 18 Nisan 2004, s. 121-128
MENTENS NELE,ÖRS YALÇIN SIDDIKA BERNA,PRENEEL BART,VANDEWALLE JOOS
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Design of core blocks and implementation on a programmable logic controller for a train signalization system
2015 23nd Signal Processing and Communications Applications Conference (SIU), 16 Mayıs 2015, s. 1942-1945
AKMANSAYAR BUSE,KURTULAN SALMAN,ÖRS YALÇIN SIDDIKA BERNA
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